1. Field of the Invention
The present invention relates to a semiconductor substrate for use in production of a semiconductor integrated circuit device such as semiconductor memories, microprocessors, and system LSIs; and a process for production thereof. In particular, the present invention relates to a semiconductor substrate having thereon a mark for identification of the semiconductor substrates and the like, and a process for production thereof.
2. Related Background Art
The semiconductor substrate includes mirror-wafers which are a disk-shaped substrate produced by slicing an ingot and have at least one face polished, and epitaxial wafers constituted of a mirror-wafer and a semicrystalline semiconductor layer formed on the mirror-wafer.
On the other hand, an SOI technique is widely known which forms a single-crystalline semiconductor layer on an insulator or on a substrate having an insulating layer. This product is called a silicon-on-insulator, or a semiconductor-on-insulator. The semiconductor substrate formed thereby is called an SOI substrate or an SOI wafer.
Three processes below are typical for producing SOI substrates:
(1) A SIMOX process (separation by ion-implanted oxygen) which forms an SiO2 layer by oxygen ion implantation into an Si single-crystalline substrate.
(2) A smart cut process which comprises the steps of implanting hydrogen ions into an Si single-crystalline substrate, bonding another substrate, heat-treating it to grow microbubbles formed in the ion-implanted layer, and separating the Si single-crystalline substrate. The SOI substrate produced by this process is known as Unibond. The detail thereof is disclosed in Japanese Patent Application Laid-Open No. 5-211128 and its corresponding U.S. Pat. No. 5,374,564.
A modification of this process is known which comprises the steps of implanting hydrogen ions by hydrogen plasma into an Si single-crystalline substrate, bonding another substrate thereon, and applying high-pressure nitrogen gas to the side wall of the bonded substrates to separate the Si single-crystalline substrate at the ion-implanted layer.
(3) A still another process for SOI substrate production is a process for transferring a porous semiconductor layer formed on a porous body onto another substrate. This process is known to give a highest quality of the SOI substrate since the semiconductor layer can be formed by epitaxial growth on a porous body. Specific example are disclosed in Japanese Patent No. 2,608,351 and its corresponding U.S. Pat. No. 5,371,037, Japanese Patent Application Laid-Open No. 7-302889 and its corresponding U.S. Pat. No. 5,856,229, and Japanese Patent No. 2,877,800 and its corresponding EP 0,867,917. The process shown in these patent and applications is advantageous in that the thickness of the SOI layer is uniform, crystal defect density can readily be decreased, the surface of the SOI layer has a good flatness, the equipment for the production is inexpensive, a wide range of the SOI film thickness from several hundred Å to about 10 μm can be produced with one equipment, and so forth.
When wafers pass through the production step of semiconductor integrated circuit devices (device step), it is preferable that the wafers are identified individually. The identification of the wafers is highly effective in managing the step history of the individual wafers, and is utilized in failure analysis, optimization of the step, production control, and so forth. The identification of mirror wafers can be conducted using a mark formed on the wafer surface with a laser beam.
FIG. 18 shows a cross section of a wafer after thus laser marking. The region of the surface of the wafer irradiated with laser beam is melted to become a recessed portion, and the wafer material repelled out from the recessed portion by melting solidifies on the periphery of the recessed portion in a shape of a somma as shown in FIG. 18. For example, in the case where the laser having a power of 220 mW is applied in dot onto the surface of a silicon wafer, the maximum diameter X1 of the deformed region ranges from 0.04 mm to 0.05 mm, the diameter X2 of the recessed portion at the center ranges from 0.02 mm to 0.03 mm, the depth Y1 of the recessed portion ranges from 2 μm to 3 μm, and the height Y2 of the protruded portion ranges from 0.5 μm to 1.0 μm. These dimensions vary depending on the laser power. In practice, laser beam is applied in pulse to form many dots partially overlapped or separately, thereby picturing a mark. The wafer material to be the somma may be disappear. It is possible that the mark without the somma is formed by adjusting laser power, laser frequency or shot counts of laser. Shallow mark with somma may be formed by low power laser. High power laser forms deep mark without somma by scattering or spreading the material to be the somma. The mark on the mirror wafer is usually constituted from about 10 alphanumerical characters, and denotes a specific ID number of each of the wafers. This is a normal method which is prescribed by the International Standard of SEMI.
Such a laser marking method is assumed for usual Si mirror wafers, and the marking position is also prescribed in the SEMI Standard.
FIG. 19 is a top view of a mirror wafer 21 having a mark formed thereon, and FIG. 20 is a sectional view of the mirror wafer 21 at and around the mark. For example, in a 8-inch wafer as shown in FIG. 19 with a notch 12 placed upward, taking the center 100 of the wafer as the origin (0,0) of an x-y coordinate, the aforementioned SEMI Standard prescribes that a mark 4 should be formed in a marking region 24 where X ranges from −9.25 to +9.25 mm, Y ranges from +93.7 to +96.5 mm, that is, in a rectangular region 24 in the height L2 being 2.8 mm, the length L1 being 18.5 mm.
If this standard is applied to the SOI wafer, the marking range comes to the surface region of the semiconductor layer (SOI layer) on the insulating layer.
FIG. 21 is a top view of an SOI wafer having the mark formed thereon. FIG. 22 is a sectional view at and around the mark. The laser output level and other conditions of the laser are prescribed for Si mirror wafers not to cause splash of particles. Therefore, in the marking on an SOI wafer according to the above SEMI standard, particles are generated and a dot diameter changes in some cases due to its multilayer structure and the action of a heat-accumulating layer of SiO2.
In the case of deep mark, change of dot diameter is more seriously. FIG. 23 shows schematically this state. For example, in the case where a laser beam is projected onto an SOI wafer having an SOI layer of 100 to 200 nm thick, a buried insulating layer of 100 to 200 nm thick under the same laser irradiation conditions as in the case of FIG. 18, the diameter X1 of the inner protruded portion is about 0.045 mm, the diameter X2 of the recessed portion is about 0.04 mm, the distance X3 between the inner protruded portion and the outer protruded portion ranges from 0.02 to 0.03 mm, the depth Y1 of the recessed portion ranges from 2.5 to 3.0 μm, the height Y2 of the inner protruded portion ranges from 1.0 to 1.5 μm, and the height Y3 of the outer protruded portion ranges from 0.8 to 1.5 μm. Incidentally, the depth Y1 of the recessed portion, and the heights Y2 and Y3 are indicated as approximate values.
In formation of the mark on the SOI layer surface, it is observed that the recessed portion constituting marked characters becomes bold and particles 25 are splashed around the characters, as shown in FIG. 23. The conditions of not causing the splashing of particles depend on the SOI layer structure and the thickness of the respective layers, so that the setting conditions therefor are complicated and laborious. Furthermore, when the laser has a lower output level that the particle splashing is retarded, the depth of the recessed portion formed by the laser irradiation becomes smaller, thereby rendering the reading of the mark difficult.